TSV / Die Stacking
Through-silicon vias — the vertical wiring that makes HBM possible
Through-silicon vias (TSVs) are vertical copper interconnects drilled through thinned DRAM dies that let 8-16 dies stack and communicate, and the associated stacking/bonding (MR-MUF at SK Hynix, TC-NCF at Samsung, and a move toward hybrid bonding for HBM4/HBM4E) is the yield-limiting art of HBM manufacture. As stacks grow taller and dies thinner, warpage, thermal dissipation, and bonding yield become the gating engineering problems. Hybrid bonding is expected to displace microbump stacking in future HBM generations.
Function
Vertical die-to-die interconnect in HBM
Methods
MR-MUF, TC-NCF, hybrid bonding (future)
Constraint
Warpage, thermals, bonding yield
How it fits the stack
TSV / Die Stacking with what it depends on (above) and what it feeds (below). The figure renders as a crawlable diagram and upgrades to an interactive 3D graph as it scrolls into view.
TSV / Die Stacking in the AI stack. TSV / Die Stacking with its immediate upstream dependencies (top) and downstream dependents (bottom) in the AI value chain. Hover a node in 3D, or read the full relationships below.
Graph data (text) — 3 entities, 3 relationships
- TSV / Die Stacking —supplies→ DISCO Corporation
- High-Bandwidth Memory (HBM) —used by→ TSV / Die Stacking
- High-Bandwidth Memory (HBM) —uses→ TSV / Die Stacking