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DRAM

The volatile working memory that HBM is built from

DRAM is the foundational volatile memory technology; HBM is a specialized 3D-stacked packaging of DRAM dies, so every HBM stack consumes leading-edge DRAM wafer capacity. The AI boom has diverted DRAM capacity into high-margin HBM, tightening supply and lifting prices for conventional DDR5/LPDDR/GDDR used in CPUs, servers, and GPUs. Advanced DRAM nodes (1-alpha/1-beta/1-gamma, moving toward EUV patterning) are made by SK Hynix, Samsung, and Micron.

Relation to HBM

HBM = 3D-stacked DRAM dies

Makers

SK Hynix, Samsung, Micron

AI effect

Capacity diverted to HBM tightens DDR5/GDDR

Leading nodes

1-gamma; EUV adoption in DRAM

How it fits the stack

DRAM with what it depends on (above) and what it feeds (below). The figure renders as a crawlable diagram and upgrades to an interactive 3D graph as it scrolls into view.

manufacturesmanufacturesdepends onmanufacturesusesDRAMToolsMicron TechnologySamsung Electronics(Memory)Silicon WaferschokepointSK HynixchokepointHigh-Bandwidth Memory(HBM)chokepoint
DRAMDepends on ↑Feeds ↓

DRAM in the AI stack. DRAM with its immediate upstream dependencies (top) and downstream dependents (bottom) in the AI value chain. Hover a node in 3D, or read the full relationships below.

Graph data (text) — 6 entities, 5 relationships
  • DRAMmanufacturesMicron Technology
  • DRAMmanufacturesSamsung Electronics (Memory)
  • DRAMdepends onSilicon Wafers
  • DRAMmanufacturesSK Hynix
  • High-Bandwidth Memory (HBM)usesDRAM