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TSMC N3 (3nm)

The node most 2025 AI silicon actually ships on

While N2 is the future chokepoint, TSMC's N3 family is where Blackwell-class and most 2025 leading AI accelerators are actually fabricated, making current N3 capacity the binding constraint on GPU supply today. Allocation of N3 wafers directly gates how many accelerators reach the market.

Role

Current AI-silicon node

How it fits the stack

TSMC N3 (3nm) with what it depends on (above) and what it feeds (below). The figure renders as a crawlable diagram and upgrades to an interactive 3D graph as it scrolls into view.

usesdepends onTSMC N3 (3nm)FabsNvidia Data-Center GPU(Blackwell/Rubin)chokepointTSMC (TaiwanSemiconductorManufacturing Company)chokepoint
TSMC N3 (3nm)Depends on ↑

TSMC N3 (3nm) in the AI stack. TSMC N3 (3nm) with its immediate upstream dependencies (top) and downstream dependents (bottom) in the AI value chain. Hover a node in 3D, or read the full relationships below.

Graph data (text) — 3 entities, 2 relationships
  • TSMC N3 (3nm) —uses→ Nvidia Data-Center GPU (Blackwell/Rubin)
  • TSMC N3 (3nm) —depends on→ TSMC (Taiwan Semiconductor Manufacturing Company)
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